Double boosting scheme for NAND to improve program inhibit characteristics
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United States of America Patent
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Jan 7, 2003
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N/A
app pub date -
Aug 3, 2001
filing date -
Aug 11, 2000
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Abstract
A method for boosting potential in the channel of unselected memory cells on a selected bit-line. In this method, a first voltage is applied to all the word-lines of the memory cells in the string. A second voltage is then applied to word-lines adjacent the selected word lines to isolate the selected memory cell. Next, a programming voltage is applied to the selected word-line. In one embodiment, a time delay is applied between applying the second voltage and applying the third voltages to ensure isolation of the selected memory cell before applying the third voltage.
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