Dynamic addressing mapping to eliminate memory resource contention in a symmetric multiprocessor system
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United States of America Patent
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Jan 7, 2003
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N/A
app pub date -
May 16, 2000
filing date -
May 16, 2000
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Abstract
A dynamic address mapping technique eliminates contention to memory resources of a symmetric multiprocessor system having a plurality of processors arrayed as a processing engine. The technique defines two logical-to-physical address mapping modes that may be simultaneously provided to the processors of the arrayed processing engine to thereby present a single contiguous address space for accessing individual memory locations, as well as memory strings, within the memory resources. These addressing modes include a bank select mode and a stream mode.
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