Integrated circuit memory chip for use in single or multi-chip packaging
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United States of America Patent
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Jan 14, 2003
Grant Date -
N/A
app pub date -
Oct 10, 2001
filing date -
Oct 10, 2001
priority date (Note) -
In Force
status (Latency Note)
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Abstract
An integrated circuit chip suitable for use in either a single chip packaged configuration or a multi-chip packaged configuration is disclosed. The chip has a conventional memory circuit portion and a control circuit portion. In operation as a single chip packaged configuration, the control circuit portion is inactive. In a multi-chip packaged configuration, the control circuit serves to prolong the activation of the currently addressed memory chip, while delaying the activation of the memory chip which is to be addressed in the next memory address cycle.
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