Content addressable memory apparatus and method of operating the same
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United States of America Patent
Stats
-
Jan 21, 2003
Grant Date -
Jul 25, 2002
app pub date -
Jun 28, 2001
filing date -
Jan 19, 2001
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An apparatus and an operation method of a content addressable memory (CAM). The content addressable memory has a memory array and a frequency multiplier. The memory array has a memory cell row, which has a plurality of memory portions and a tag-compare portion. Each memory portion is used to store bit data. The tag-compare portion receives a compare data signal, which is compared to the bit data stored in all the memory portions. The memory portions are connected to the tag-compare portion in parallel. The frequency multiplier receives an external drive signal, and outputs an internal compare signal after multiplying a frequency of the drive signal with a certain numeric. The tag-compare portion sequentially compares the compare data signal with the bit data stored in each memory portion according to the clock of the internal compare signal, and outputs a match signal.
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