Digital signal processor having distributed register file
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United States of America Patent
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Jan 21, 2003
Issued Date -
N/A
app pub date -
Dec 22, 1998
filing date -
Jan 25, 1996
priority date (Note) -
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Abstract
A computation block for use in a digital signal processor includes a register file for storage of operands and results and one or more computation units for executing digital signal computations. A first digital signal computation is performed with one of the computation units, and an intermediate result is produced. The intermediate result is transferred from a result output of the computation unit to an intermediate result input of one or more of the computation units without first transferring the intermediate result to the register file. A second digital signal computation is performed using the intermediate result to produce a final result or a second intermediate result.
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