Method for providing pre-designed modules for programmable logic devices
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United States of America Patent
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Jan 21, 2003
Grant Date -
N/A
app pub date -
Aug 3, 2001
filing date -
Aug 3, 2001
priority date (Note) -
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Abstract
A method for providing a core for a programmable logic device (PLD) is provided. In this method, a vendor can designate the size and ports of a core. Using this information, a user can generate a top-level design that can accommodate the core. The user can then submit that top-level design to the vendor, or a third party designated by the vendor, to generate a complete configuration bitstream for the PLD. The user can use this configuration bitstream to program the PLD, thereby implementing the top-level design including the core. The number of bits in this configuration bitstream is typically large enough to render reverse engineering economically unfeasible. Thus, the method allows vendors to retain control over their proprietary core IP and discourages undetectable use of this IP.
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