Apparatus and method for multiple serial data synchronization using channel-lock FIFO buffers optimized for jitter
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United States of America Patent
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Jan 28, 2003
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N/A
app pub date -
Apr 7, 1999
filing date -
Apr 7, 1999
priority date (Note) -
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Abstract
The invention provides an apparatus, and related method, for receiving and synchronizing parallel data transmitted over multiple serial data channels. The synchronization technique uses a channel lock FIFO buffer on each received serial data channel. The FIFO buffers are configured to tolerate a significant amount of jitter between channels and clock tree delay within the synchronization apparatus.
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