Method for manufacturing gate structure for use in semiconductor device
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Feb 4, 2003
Grant Date -
Jan 10, 2002
app pub date -
Jun 27, 2001
filing date -
Jun 30, 2000
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A method for manufacturing a gate structure for use in a semiconductor device including the steps of sequentially forming a gate oxide layer, a polysilicon layer, a tungsten layer and a nitride layer on top of a semiconductor substrate, patterning the nitride layer, the tungsten layer, the polysilicon layer and the gate oxide layer into a predetermined configuration, and carrying out a rapid thermal annealing (RTA) in an NH.sub.3 ambient, thereby forming a diffusion barrier layer between a patterned tungsten layer and a patterned polysilicon layer.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully