Semiconductor integrated circuit device having spare word lines
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United States of America Patent
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Feb 11, 2003
Grant Date -
Jan 16, 2003
app pub date -
Mar 13, 2002
filing date -
Jul 13, 2001
priority date (Note) -
Expired
status (Latency Note)
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Abstract
In the case where a defective normal word line in a memory cell array has been replaced with a spare word line, a word line precharge signal output from a word line precharge signal generation circuit is activated to L level during a precharge period. As a result, a normal word line activation circuit holds the defective normal word line at a precharge potential level. Accordingly, the semiconductor integrated circuit device stably conducts sensing operation even when the defective normal word line replaced with the spare word line is short-circuited to a bit line.
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