System and method for instruction cache re-ordering
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United States of America Patent
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Feb 11, 2003
Grant Date -
Jul 4, 2002
app pub date -
Dec 29, 2000
filing date -
Dec 29, 2000
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The present invention is directed to a system and method for implementing a re-ordered instruction cache. In one embodiment, groups or 'packets' of instructions with specific packet sizes are formed. Each of packets includes two or more positions. The two or more positions are defined such that they support one or more different types of instructions. Each of the positions are also correlated to a subset of the specialized execution units of the processor. Given a specific packet size and definitions for each of the positions, each of the instructions are re-ordered according to instruction type and loaded into the instruction cache in the new order.
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