Method for making a semiconductor chip package
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United States of America Patent
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Feb 18, 2003
Issued Date -
N/A
app pub date -
Sep 28, 2000
filing date -
Sep 20, 1994
priority date (Note) -
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Abstract
A method for making a semiconductor chip package. At least one compliant pad is provided on a surface of a substrate and a chip unit is attached to the at least one compliant pad. The at least one compliant pad has a first coefficient of thermal expansion ('CTE'). An encapsulant having a second CTE lower than the CTE of the compliant pads is disposed around the at least one compliant pad to form a composite layer between the chip unit and the substrate.
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