CMOS switch with linearized gate capacitance
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Feb 18, 2003
Grant Date -
N/A
app pub date -
Mar 12, 2001
filing date -
Mar 12, 2001
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A CMOS switch with compensation circuitry that maintains linearized gate capacitance, said switch capable of selectively processing a signal independent of changes to gate capacitance current. The switch passes signals which are substantially insensitive to changes in source impedance. Thus, the switch processes an analog signal with a minimum of distortion as a result of gate capacitance currents.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully