Method and apparatus for phase locked loop having reduced jitter and/or frequency biasing

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United States of America Patent

PATENT NO 6526111
SERIAL NO

09197615

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A phase lock loop includes a phase detector, a charge pump circuit, a controlled oscillator, and a jitter control circuit. The control oscillator may also include a biasing circuit to provide the frequency biasing. The phase detection circuit is operably coupled to receive the reference signal and a feedback signal and to produce therefrom a phase different signal. The phase different signal is provided to the charge pump circuit, which includes a first current source and a second current source. The first current source is dominate when the phase different signal is in a first stage (e.g., charge up) and the second current source is dominate when the phase signal is in the second state (e.g., charge down). The charge pump circuit outputs a representative signal that is provided to the control oscillator which, in response, generates the output signal. The output signal is fed back to the phase detection circuit as the feedback signal. The jitter control circuit is operably coupled to the first and second current sources of the charge pump circuit and is operable to impel the currents of the first and second current sources to substantially match.

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Patent Owner(s)

Patent OwnerAddress
SIGMATEL LLC1601 S MOPAC EXPRESSWAY SUITE 1OO AUSTIN TX 78735

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Prasad, Ammisetti V Austin, TX 13 226

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