Importance

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Abstract

A method and system for arbitrating access to a shared disk controller resource, including a buffer memory of a hard disk controller (HDC). An access cycle with a first cycle duration are disclosed and a first amount of time is allocated to a first accessing unit including an error correction code (ECC) engine, a microprocessor first-in-first-out (FIFO) unit, or a memory refresh/data format data fetch unit. The shared controller resource is accessed using the first accessing unit for a first duration, where the first duration is no greater than the first amount of time. A second amount of time and an unused portion of the first amount of time is allocated to a second accessing unit such as a disk formatter. Arbitration limit registers may be used to specify the number of HDC clock cycles per access cycle available to an accessing unit during which it can access the buffer memory. A global arbitration limit counter may be used to keep track of the duration of the accessing units.

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First Claim