Communication error reporting mechanism in a multiprocessing computer system

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United States of America Patent

PATENT NO 6536000
SERIAL NO

09419823

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A multiprocessing computer system includes a plurality of processing nodes, each having one or more processors, a memory, and a system interface. The plurality of processing nodes may be interconnected through a global interconnect network which supports cluster communications. The system interface of an initiating node may launch a request to a remote node's memory or I/O. The computer system implements an error communication reporting mechanism wherein errors associated with remote transactions may be reported back to a particular processor which initiated the transaction. Each processor includes an error status register that is large enough to hold a transaction error code. The protocol associated with a local bus of each node (i.e., a bus interconnecting the processors of a node to the node's system interface) includes acknowledgement messages for transactions when they have completed. In the event a transaction which is transmitted by a system interface upon the global interconnect network on behalf of a particular processor incurs an error, the system interface sets an error flag in the acknowledgement message and provides an associated error code. If the acknowledgement message denotes an error, the error code is written into the processor's error status register for later retrieval by software. In various embodiments, a system interface may acknowledge a transaction to a given processor early (even if that transaction has not completed globally) if a subsequent transaction from the same processor is pending in the interface.

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Patent Owner(s)

Patent OwnerAddress
ORACLE AMERICA INC500 ORACLE PARKWAY REDWOOD SHORES CA 94065

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hagersten, Erik E Uppsala, SE 68 2045
Jackson, Christopher J Westford, MA 20 857

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