Hierarchical memory for efficient data exchange control
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United States of America Patent
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Mar 25, 2003
Grant Date -
Sep 26, 2002
app pub date -
Apr 24, 2001
filing date -
Apr 28, 2000
priority date (Note) -
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Abstract
A data processing system and method involving a data requesting element and a first memory element from which said data requesting element requests data is described. An example of such a system is a processor and a first level cache memory, or two memories arranged in a hierarchy. A second memory element is provided between the first memory element and the requesting element. The second memory element stores data units read out of said first memory element, and performs a prefetch procedure, where said prefetch procedure contains both a sequential sub-procedure and a sub-procedure based on prefetch data identifiers associated with some of the data units.
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