Dynamic impedance compensation circuit and method
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United States of America Patent
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Apr 1, 2003
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N/A
app pub date -
Dec 21, 1999
filing date -
Dec 21, 1999
priority date (Note) -
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Abstract
An impedance compensation circuit and method for an input/output buffer provides dynamic impedance compensation by using programmable impedance arrays and a dynamically adjustable on-chip load. Accordingly, among other advantages, only a single off-chip or external calibrated impedance resistor is used and only a single test pad is necessary.
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