SRAM device
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United States of America Patent
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Apr 1, 2003
Grant Date -
Aug 8, 2002
app pub date -
Jan 14, 2002
filing date -
Feb 8, 2001
priority date (Note) -
In Force
status (Latency Note)
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Abstract
An SRAM device of the present invention is an SRAM device, including: a plurality of bit line pairs that are arranged substantially parallel to one another and connected to different memory cells, respectively; selection means for selecting one bit line pair from among the plurality of bit line pairs; and potential holding means for holding a precharge potential of bit lines that are respectively on opposite sides of the one bit line pair with the one bit line pair being selected, wherein an interval between two adjacent bit line pairs is smaller than an interval between two bit lines of the same bit line pair.
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