Electronic chip package
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United States of America Patent
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Apr 8, 2003
Grant Date -
Mar 14, 2002
app pub date -
Sep 10, 2001
filing date -
Nov 8, 1996
priority date (Note) -
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Abstract
An electronic chip package is provided having a laminated substrate. The laminated substrate includes at least one conductive layer and at least one dielectric layer which is bonded to the conductive layer. The dielectric layer has a glass transition temperature T.sub.g greater than 200.degree. C. and a volumetric coefficient of thermal expansion of .ltoreq.75 ppm/.degree. C. A semiconductor device is electrically attached to the laminated substrate.
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