Semiconductor wafer processing apparatus and method

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6549393
APP PUB NO 20030030960A1
SERIAL NO

09946615

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Abstract

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A wafer stage 2 for holding a semiconductor wafer in a plasma treatment apparatus by setting the wafer on the wafer stage, said wafer stage 2 comprising a base material 26 equipped with refrigerant flow paths for allowing a refrigerant for temperature adjustment to flow; a stress-reducing member 28 provided on the wafer setting side of said base material 26 and having a smaller thermal expansion coefficient than does said base material; a dielectric film 30 provided on the wafer setting side of said stress-reducing member; and a deflection-preventing member 29 provided on the wafer non-setting side of said base material and having a smaller thermal expansion coefficient than does said base material. When the wafer stage is used, the temperature of the wafer as a substrate to be processed can be controlled uniformly and very accurately.

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Patent Owner(s)

Patent OwnerAddress
HITACHI LTD6-6 MARUNOUCHI 1-CHOME CHIYODA-KU TOKYO 1008280 ?1008280

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kanai, Saburo Hikari, JP 49 695
Kanno, Seiichiro Chiyoda, JP 64 1075
Kawahara, Hironobu Kudamatsu, JP 44 909
Suehiro, Mitsuru Kudamatsu, JP 26 733
Yoshioka, Ken Hikari, JP 116 2058

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