Importance

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Abstract

A system for testing an embedded processor, such as an embedded processor for a spacecraft. The system comprises an Emulated Spacecraft Control Processor (ESCP) which contains the embedded processor, a simulation engine, and a host computer. The emulated spacecraft control processor includes a dual-port memory for emulating the memory for the embedded processor and data transfer logic which monitors cycles of the embedded processor to arbitrate access to the dual-port memory, the data transfer logic is operative to allow an access to the dual-port memory when the embedded processor performs an I/O cycle, wherein the access is performed before a subsequent machine cycle of the embedded processor.

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First Claim