Dual silicon-on-insulator device wafer die

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United States of America Patent

PATENT NO 6558994
APP PUB NO 20020127816A1
SERIAL NO

09841564

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Abstract

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A silicon-on-insulator semiconductor device and manufacturing method therefor is provided in which a single wafer die contains a transistor over an insulator layer to form a fully depleted silicon-on-insulator device and a transistor formed in a semiconductor island over an insulator structure on the semiconductor wafer forms a partially depleted silicon-on-insulator device.

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Patent Owner(s)

Patent OwnerAddress
CHARTERED SEMICONDUCTOR MANUFACTURING LTDSINGAPORE SINGAPORE CITY SINGAPORE CITY SINGAPORE

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cha, Randall Cher Liang Singapore, SG 29 355
Goh, Wang Ling Singapore, SG 18 232
Lee, Tae Jong Singapore, SG 32 439
Lim, Yeow Kheng Singapore, SG 28 326
See, Alex Singapore, SG 86 1502

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