Regenerative signal level converter
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United States of America Patent
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May 6, 2003
Grant Date -
Oct 25, 2001
app pub date -
Apr 16, 2001
filing date -
Apr 21, 2000
priority date (Note) -
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Abstract
Method and circuitry for converting a differential logic signal to a single-ended logic signal that minimize delay. In specific embodiments differential logic signals of the type employed in, for example, current-controlled complementary metal-oxide-semiconductor (C.sup.3 MOS) logic are converted to single-ended rail-to-rail CMOS logic levels using the regenerative action of a
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