Power down voltage control method and apparatus

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6560158
APP PUB NO 20020159322A1
SERIAL NO

09981782

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A semiconductor device is provided for controlling entry to and exit from a power down (DPD) mode of a semiconductor memory comprising; a plurality of voltage generators for providing operating voltages to the semiconductor memory; a DPD controller for detecting a DPD condition and generating a DPD signal to control the application of the operating voltages to the semiconductor memory; and biasing circuitry for biasing a plurality of nodes of at least one of the plurality of voltage generators to at least one predetermined voltage potential to prevent false triggering of circuits upon entry/exit of DPD mode. Also provided is a semiconductor device, comprising: a plurality of input buffers for buffering a plurality of DPD-type signals for signaling a power down (DPD) condition including a DPD enter/exit signal: an auxiliary buffer for separately buffering the DPD enter/exit signal; a plurality of voltage generators for supplying operating voltages to internal circuit; DPD control circuit for receiving the DPD-type signals to decode DPD enter and exit commands and for outputting a voltage generator control signal to turn off the voltage generators when DPD enter command is decoded, and to turn off the plurality of buffers excluding the auxiliary buffer; and an auto-pulse generator for generating a voltage pulse upon receiving the DPD exit command to initialize internal circuits of the semiconductor device.

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Patent Owner(s)

  • SAMSUNG ELECTRONICS CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Choi, Jong-hyun Suwon, KR 165 2197
Jang, Hyun-soon Seoul, KR 38 1052
Lee, Jong-eon Suwon, KR 10 137
Yoo, Jei-hwan Suwon, KR 37 569

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