Semiconductor storage device having memory chips in a stacked structure
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United States of America Patent
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May 20, 2003
Issued Date -
N/A
app pub date -
Sep 19, 2000
filing date -
Aug 6, 1999
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Two memory chips each being subjected to memory accesses in 2-bit units are assembled into a stacked structure by placing their back surfaces one over the other, so as to make memory accesses in 4-bit units. A memory module is so constructed that a plurality of such semiconductor storage devices, in each of which two memory chips each being subjected to memory accesses in 2-bit units are assembled into a stacked structure by placing their back surfaces one over the other, so as to make memory accesses in 4-bit units, are mounted on a mounting circuit board which is square and which is formed with electrodes along one latus thereof.
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