Memory storage cell based array of counters
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United States of America Patent
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May 20, 2003
Issued Date -
N/A
app pub date -
Apr 30, 2001
filing date -
Sep 23, 1999
priority date (Note) -
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Abstract
A multi-counter based system having a counter array. Each counter of the array having a memory cell. The system also includes an address decoder coupled to the counter array to select at least one of the memory cells within the counter array and read/write circuitry coupled to the counter array to pass data with the counter array.
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