Double side polished wafers having external gettering sites, and method of producing same
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United States of America Patent
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Jun 10, 2003
Grant Date -
N/A
app pub date -
May 31, 2002
filing date -
May 31, 2002
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A semiconductor wafer manufacturing process is disclosed wherein a double side polished wafer having oxygen induced stacking faults to provide extrinsic gettering on the back surface of the wafer. The process includes polishing the back surface of the wafer, and depositing a thin polysilicon film on the polished back surface. The wafer is then subjected to a thermal oxidation step, wherein the polysilicon film is consumed by the thermal oxidation step. The oxide layer is then stripped from the back surface, leaving oxygen induced stacking faults on the back surface of the wafer. The front surface of the wafer is then polished, thereby producing a double side polished wafer containing extrinsic gettering sites on the polished back surface.
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