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Abstract

An analog bias current optimization circuitry in a transceiver of a data communication system is capable of controlling the amount of a bias current of each of analog circuits. The analog bias current optimization circuitry generates a signal pattern which is sent to the analog circuits, such as TX-D/A converter, driver, RX-A/D converter, etc., and evaluates the signal quality of the analog circuits. Based on the evaluated signal quality, a bias current to each of the analog circuits is adjusted. A margin may be added to the bias current to ensure the signal quality in case there is a change in power supply voltage and/or temperature. One method of evaluating the signal quality of the analog circuits is to evaluate the residual echo of the output of an echo canceller (EC). Another method is to evaluate a signal error in a decision feedback equalizer (DFE). A further method is to evaluate a harmonic distortion at the output of a filter.

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