US Patent No: 6,578,174

Number of patents in Portfolio can not be more than 2000

Method and system for chip design using remotely located resources

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Abstract

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A multi-faceted circuit design platform facilitates the design of circuits and chips by making it easier for designers to locate and incorporate available virtual component blocks into new designs. The platform provides designers with the necessary support data on the virtual component blocks and allows designers to perform integration and connectivity verification as well as basic functional verification. In addition, the platform may provide other tools and services, e.g., electronic design automation software, computing and processing resources, integrated circuit fabrication, etc. The tools and services may be from internal as well as external sources and may be provided in whole or in part. Further, the platform may facilitate purchase, lease, or other acquisitions of the tools and services offered through it. Access to the platform may be achieved through a variety of applications.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
CADENCE DESIGN SYSTEMS, INC.SAN JOSE, CA1678

International Classification(s)

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  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Zizzo, Claudio West Lothian, GB 7 173

Cited Art Landscape

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (2)
5,878,408 Data management system and process 225 1996
* 6,058,426 System and method for automatically managing computing resources in a distributed computing environment 108 1997
 
LSI LOGIC CORPORATION (1)
* 5,933,356 Method and system for creating and verifying structural logic model of electronic design from behavioral description, including generation of logic and timing models 168 1996
 
Cadence Design Systems, Inc. (2)
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6,269,467 Block based design methodology 122 1999
 
COMMUNITY UNITED IP, LLC (1)
5,862,223 Method and apparatus for a cryptographically-assisted commercial network system designed to facilitate and support expert-based commerce 878 1996
 
GENESYS TELECOMMUNICATIONS LABORATORIES, INC. (1)
* 6,141,724 Remote application design 29 1998
* Cited By Examiner

Patent Citation Ranking

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Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (4)
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* 2007/0157,139 Characterization and verification for integrated circuit designs 19 2007
 
CYPRESS SEMICONDUCTOR CORPORATION (45)
8,149,048 Apparatus and method for programmable power management in a programmable analog circuit block 4 2001
8,176,296 Programmable microcontroller architecture 9 2001
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8,160,864 In-circuit emulator and pod synchronized boot 0 2001
8,103,496 Breakpoint control in an in-circuit emulation system 6 2001
8,078,970 Graphical user interface with user-selectable list-box 5 2001
* 8,069,405 User interface for efficiently browsing an electronic document using data-driven tabs 4 2001
7,774,190 Sleep and stall in an in-circuit emulation system 4 2001
7,770,113 System and method for dynamically generating a configuration datasheet 5 2001
7,010,773 Method for designing a circuit for programmable microcontrollers 42 2001
* 6,966,039 Method for facilitating microcontroller programming 45 2001
8,103,497 External interface for event architecture 5 2002
* 7,100,139 Pinout views for allowed connections in GUI 9 2002
8,533,677 Graphical user interface for dynamically reconfiguring a programmable device 2 2002
8,089,461 Touch wake for electronic devices 2 2005
8,286,125 Model for a hardware device-independent method of defining embedded firmware for programmable systems 2 2005
8,069,436 Providing hardware independence to automate code generation of processing device firmware 5 2005
8,085,067 Differential-to-single ended signal converter circuit and method 6 2006
8,067,948 Input/output multiplexer bus 17 2007
7,825,688 Programmable microcontroller architecture(mixed analog/digital) 6 2007
8,069,428 Techniques for generating microcontroller configuration information 14 2007
8,049,569 Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes 8 2007
8,092,083 Temperature sensor with digital bandgap 3 2007
* 2008/0259,998 TEMPERATURE SENSOR WITH DIGITAL BANDGAP 45 2007
8,402,313 Reconfigurable testing system and method 5 2007
8,026,739 System level interconnect with programmable switching 30 2007
7,737,724 Universal digital block interconnection and channel routing 13 2007
8,085,100 Poly-phase frequency synthesis oscillator 2 2008
8,078,894 Power management architecture, method and configuration system 12 2008
8,065,653 Configuration of programmable IC design elements 2 2008
8,040,266 Programmable sigma-delta analog-to-digital converter 4 2008
* 2008/0297,388 PROGRAMMABLE SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER 8 2008
8,516,025 Clock driven dynamic datapath chaining 2 2008
8,130,025 Numerical band gap 3 2008
8,120,408 Voltage controlled oscillator delay cell and method 1 2008
9,448,964 Autonomous control in a programmable system 0 2010
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8,358,150 Programmable microcontroller architecture(mixed analog/digital) 5 2010
8,555,032 Microcontroller programmable system on a chip with programmable interconnect 3 2011
8,499,270 Configuration of programmable IC design elements 3 2011
8,909,960 Power management architecture, method and configuration system 0 2011
8,476,928 System level interconnect with programmable switching 2 2011
8,793,635 Techniques for generating microcontroller configuration information 0 2011
8,717,042 Input/output multiplexer bus 0 2011
8,736,303 PSOC architecture 0 2011
 
BULL S.A. (1)
* 7,080,331 Method and system for automatic recognition of simulation configurations of an integrated circuit 0 2003
 
GETNER FOUNDATION LLC (1)
* 6,801,826 System and method for manufacturing semiconductor devices controlled by customer 14 2002
 
VISTAPRINT SCHWEIZ GMBH (5)
* 2006/0004,638 Assisted electronic product design 17 2004
8,239,283 Product design system and method 0 2008
* 2009/0037,298 Product Design System and Method 1 2008
8,869,045 Product design system and method 0 2012
* 2012/0272,165 PRODUCT DESIGN SYSTEM AND METHOD 0 2012
 
Cadence Design Systems, Inc. (26)
7,363,099 Integrated circuit metrology 33 2002
* 2003/0229,410 Integrated circuit metrology 19 2002
7,367,008 Adjustment of masks for integrated circuit fabrication 201 2002
7,353,475 Electronic design for integrated circuits based on process related variations 32 2002
* 7,325,206 Electronic design for integrated circuits based process related variations 33 2002
7,243,316 Test masks for lithographic and etch processes 182 2002
7,174,520 Characterization and verification for integrated circuit designs 248 2002
* 2003/0237,064 Characterization and verification for integrated circuit designs 24 2002
* 2003/0229,868 Electronic design for integrated circuits based process related variations 93 2002
* 2003/0229,880 Test masks for lithographic and etch processes 17 2002
* 2003/0229,881 Adjustment of masks for integrated circuit fabrication 26 2002
7,383,521 Characterization and reduction of variation for integrated circuits 255 2004
* 2005/0132,306 Characterization and reduction of variation for integrated circuits 49 2004
7,712,056 Characterization and verification for integrated circuit designs 149 2007
7,853,904 Method and system for handling process related variations for integrated circuits based upon reflections 4 2007
* 2008/0027,698 Method and System for Handling Process Related Variations for Integrated Circuits Based Upon Reflections 18 2007
7,962,867 Electronic design for integrated circuits based on process related variations 143 2008
8,209,647 Extensible verification system 0 2008
8,001,516 Characterization and reduction of variation for integrated circuits 22 2008
* 2009/0031,261 CHARACTERIZATION AND REDUCTION OF VARIATION FOR INTEGRATED CIRCUITS 228 2008
* 8,156,453 Method and system identifying and locating IP blocks and block suppliers for an electronic design 6 2008
8,521,483 Method and apparatus for concurrent design of modules across different design entry tools targeted to single simulation 7 2010
* 8,316,342 Method and apparatus for concurrent design of modules across different design entry tools targeted to a single layout 7 2010
8,516,433 Method and system for mapping memory when selecting an electronic product 0 2010
* 8,375,344 Method and system for determining configurations 1 2010
* 8,495,531 Method and system for providing an architecture for selecting and using components for an electronic design 1 2011
 
CADALYTIC MEDIA, INC. (1)
* 2007/0050,268 Matching CAD objects with relevant manufacturer-and supplier-supplied content leveraging pay-for-placement search engine technology 3 2005
 
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (5)
* 7,461,371 General purpose memory compiler system and associated methods 55 2003
* 2005/0060,500 General purpose memory compiler system and associated methods 53 2003
* 7,003,362 System and method for customized tape-out requests for integrated circuit manufacturing 4 2004
* 2005/0256,602 System and method for customized tape-out requests for integrated circuit manufacturing 1 2004
* 7,941,770 System and method for implementing an online design platform for integrated circuits 0 2007
 
FormFactor, Inc. (3)
* 7,092,902 Automated system for designing and testing a probe card 18 2004
7,593,872 Method and system for designing a probe card 3 2006
7,930,219 Method and system for designing a probe card 0 2009
 
XILINX, INC. (30)
6,781,407 FPGA and embedded circuitry initialization and processing 14 2002
6,820,248 Method and apparatus for routing interconnects to devices with dissimilar pitches 27 2002
6,976,160 Method and system for controlling default values of flip-flops in PGA/ASIC-based designs 23 2002
6,941,538 Method and system for integrating cores in FPGA-based system-on-chip (SoC) 58 2002
* 6,754,882 Method and system for creating a customized support package for an FPGA-based system-on-chip (SoC) 23 2002
* 2003/0163,798 Method and system for integrating cores in FPGA-based system-on-chip (SoC) 4 2002
6,934,922 Timing performance analysis 10 2002
7,111,217 Method and system for flexibly nesting JTAG TAP controllers for FPGA-based system-on-chip (SoC) 12 2002
6,839,874 Method and apparatus for testing an embedded device 17 2002
7,187,709 High speed configurable transceiver architecture 9 2002
7,111,220 Network physical layer with embedded multi-standard CRC generator 6 2002
7,088,767 Method and apparatus for operating a transceiver in different data rates 6 2002
6,961,919 Method of designing integrated circuit having both configurable and fixed logic circuitry 11 2002
6,973,405 Programmable interactive verification agent 10 2002
6,772,405 Insertable block tile for interconnecting to a device embedded in an integrated circuit 5 2002
7,092,865 Method and apparatus for timing modeling 8 2002
7,379,855 Method and apparatus for timing modeling 5 2002
7,421,014 Channel bonding of a plurality of multi-gigabit transceivers 4 2003
7,552,415 Method and system for creating a customized support package for an FPGA-based system-on-chip (SoC) 15 2004
6,996,796 Method and system for creating a customized support package for an FPGA-based system-on-chip (SoC) 14 2004
* 2004/0225,992 Method and system for creating a customized support package for an FPGA-based system-on-chip (SoC) 1 2004
7,420,392 Programmable gate array and embedded circuitry initialization and processing 6 2004
* 2005/0040,850 Programmable gate array and embedded circuitry initialization and processing 8 2004
7,509,614 Method and system for integrating cores in FPGA-based system-on-chip (SoC) 3 2005
7,216,328 Method and system for integrating cores in FPGA-based system-on-chip (SoC) 7 2005
7,254,794 Timing performance analysis 2 2005
7,526,689 Testing address lines of a memory controller 1 2006
9,117,046 Method of generating data for estimating resource requirements for a circuit design 0 2008
7,984,412 IC design estimation using mid-level elements of IP cores 2 2008
* 7,979,835 Method of estimating resource requirements for a circuit design 7 2008
 
FLEXTRONICS AP, LLC (7)
* 7,134,096 System and method for design, procurement and manufacturing collaboration 14 2003
* 2003/0221,172 System and method for design, procurement and manufacturing collaboration 1 2003
* 7,712,058 System and method for design, procurement and manufacturing collaboration 3 2006
* 2007/0038,967 System and method for design, procurement and manufacturing collaboration 1 2006
* 8,806,398 System and method for design, procurement and manufacturing collaboration 0 2010
* 2010/0242,005 System and method for design, procurement and manufacturing collaboration 1 2010
8,799,849 System and method for design, procurement and manufacturing collaboration 0 2013
 
RENESAS TECHNOLOGY CORP. (2)
* 2003/0009,471 Semiconductor intellectual property distribution system and semiconductor intellectual property distribution method 2 2002
* 2004/0044,967 Semiconductor intellectual property transmission system 1 2003
 
SOCIONEXT INC. (2)
* 7,231,613 Apparatus and system for developing LSI 0 2002
* 2003/0182,636 Apparatus and system for developing LSI 0 2002
 
NETVINCI, INC. (2)
* 7,124,376 Design tool for systems-on-a-chip 61 2001
* 2002/0038,401 Design tool for systems-on-a-chip 22 2001
 
MENTOR GRAPHICS CORPORATION (43)
* 6,757,882 Self-describing IP package for enhanced platform based SOC design 63 2002
* 2003/0005,396 Phase and generator based SOC design and/or verification 20 2002
* 7,013,442 Synthesis strategies based on the appropriate use of inductance effects 18 2002
* 2004/0210,854 Parellel electronic design automation: shared simultaneous editing 13 2004
7,587,695 Protection boundaries in a parallel printed circuit board design environment 11 2004
7,516,435 Reservation of design elements in a parallel printed circuit board design environment 3 2004
7,305,648 Distributed autorouting of conductive paths in printed circuit boards 5 2004
* 2005/0114,821 Distributed autorouting of conductive paths 4 2004
* 2005/0044,518 Reservation of design elements in a parallel printed circuit board design environment 13 2004
* 2004/0225,988 Protection boundaries in a parallel printed circuit board design environment 18 2004
* 7,353,468 Secure exchange of information in electronic design automation 8 2004
* 2005/0071,792 Secure exchange of information in electronic design automation 2 2004
7,546,571 Distributed electronic design automation environment 46 2004
* 2006/0095,882 Distributed electronic design automation environment 20 2004
* 2006/0101,368 Distributed electronic design automation environment 60 2004
7,496,871 Mutual inductance extraction using dipole approximations 12 2004
7,590,963 Integrating multiple electronic design applications 0 2004
* 2005/0114,865 Integrating multiple electronic design applications 7 2004
8,326,926 Distributed electronic design automation architecture 3 2005
7,426,706 Synthesis strategies based on the appropriate use of inductance effects 13 2006
* 2006/0143,586 Synthesis strategies based on the appropriate use of inductance effects 8 2006
* 2006/0259,978 Secure exchange of information in electronic design automation with license-related key generation 5 2006
8,161,438 Determining mutual inductance between intentional inductors 6 2006
* 2006/0282,492 Determining mutual inductance between intentional inductors 12 2006
* 2009/0222,927 Concealment of Information in Electronic Design Automation 2 2007
7,698,664 Secure exchange of information in electronic design automation 4 2007
7,788,622 Distributed autorouting of conductive paths 2 2007
* 2008/0034,342 Distributed Autorouting of Conductive Paths 10 2007
* 2008/0059,932 Parallel Electronic Design Automation: Shared Simultaneous Editing 6 2007
* 2008/0148,348 SECURE EXCHANGE OF INFORMATION IN ELECTRONIC DESIGN AUTOMATION 2 2008
8,091,054 Synthesis strategies based on the appropriate use of inductance effects 3 2008
8,549,449 Mutual inductance extraction using dipole approximations 5 2009
* 2009/0172,613 Mutual Inductance extraction using dipole approximations 10 2009
8,214,788 High-frequency VLSI interconnect and intentional inductor impedance extraction in the presence of a multi-layer conductive substrate 0 2009
7,949,990 Parallel electronic design automation: shared simultaneous editing 3 2010
* 2010/0199,240 Parallel Electronic Design Automation: Shared Simultaneous Editing 1 2010
8,302,039 Secure exchange of information in electronic design automation 4 2010
* 2010/0199,107 SECURE EXCHANGE OF INFORMATION IN ELECTRONIC DESIGN AUTOMATION 1 2010
8,650,522 Determining mutual inductance between intentional inductors 0 2012
8,732,648 High-frequency VLSI interconnect and intentional inductor impedance extraction in the presence of a multi-layer conductive substrate 7 2012
8,826,204 Mutual inductance extraction using dipole approximations 0 2013
8,910,108 High-frequency VLSI interconnect and intentional inductor impedance extraction in the presence of a multi-layer conductive substrate 0 2014
9,230,054 High-frequency VLSI interconnect and intentional inductor impedance extraction in the presence of a multi-layer conductive substrate 0 2014
 
RENESAS ELECTRONICS CORPORATION (1)
* 6,968,515 Semiconductor circuit designing apparatus and a semiconductor circuit designing method in which the number of steps in a circuit design and a layout design is reduced 0 2001
 
Intellitech Corporation (1)
* 9,152,749 Management system, method and apparatus for licensed delivery and accounting of electronic circuits 0 2003
 
KABUSHIKI KAISHA TOSHIBA (3)
* 7,079,994 Method and system for producing semiconductor devices 1 2001
* 7,676,774 System LSI verification system and system LSI verification method 0 2007
* 2007/0271,533 SYSTEM LSI VERIFICATION SYSTEM AND SYSTEM LSI VERIFICATION METHOD 1 2007
 
SYNOPSYS, INC. (1)
8,032,846 Efficient provisioning of resources in public infrastructure for electronic design automation (EDA) tasks 2 2011
 
ADVANTEST CORPORATION (2)
* 8,060,851 Method for operating a secure semiconductor IP server to support failure analysis 0 2007
* 2010/0031,092 METHOD FOR OPERATING A SECURE SEMICONDUCTOR IP SERVER TO SUPPORT FAILURE ANALYSIS 5 2007
 
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. (7)
* 7,020,716 Method and system for verifying the hardware implementation of TCP/IP 4 2001
* 2003/0046,418 Method and system for verifying the hardware implementation of TCP/IP 11 2001
* 6,931,606 Automatic method and system for instantiating built-in-test (BIST) modules in ASIC memory designs 2 2001
7,269,803 System and method for mapping logical components to physical locations in an integrated circuit design environment 80 2003
7,620,743 System and method for implementing multiple instantiated configurable peripherals in a circuit design 1 2004
* 2005/0223,388 System and method for implementing multiple instantiated configurable peripherals in a circuit design 2 2004
* 2005/0204,235 Automatic method and system for instantiating built-in-test (BIST) modules in ASIC memory designs 0 2005
 
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (3)
* 2003/0229,612 Circuit design duplication system 5 2002
* 7,039,892 Systems and methods for ensuring correct connectivity between circuit designs 13 2003
* 2005/0188,334 Circuit design interface 1 2004
 
LSI LOGIC CORPORATION (2)
* 2005/0229,143 System and method for implementing multiple instantiated configurable peripherals in a circuit design 4 2004
7,139,991 Automatic method and system for instantiating built-in-test (BIST) modules in ASIC memory designs 2 2005
 
LATTICE SEMICONDUCTOR CORPORATION (2)
7,788,623 Composite wire indexing for programmable logic devices 1 2007
7,890,913 Wire mapping for programmable logic devices 1 2008
 
NATIONAL INSTRUMENTS CORPORATION (4)
* 7,559,032 System and method for enabling a graphical program to respond to user interface events 8 2001
* 2003/0071,845 System and method for enabling a graphical program to respond to user interface events 29 2001
8,205,161 Graphical programming system with event-handling nodes 2 2009
8,037,369 Error handling structure for use in a graphical program 2 2009
 
PRAESAGUS, INC. (1)
7,200,823 Electronic design for integrated circuits based process related variations 0 2002
 
VISTEON GLOBAL TECHNOLOGIES, INC. (2)
* 7,146,579 VRML interface software for image and data compilation 1 2001
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FULCRUM MICROSYSTEMS, INC. (1)
* 2004/0100,900 Message transfer system 5 2003
 
RICOH COMPANY, LTD. (1)
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INVENTEC CORPORATION (2)
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* 2006/0236,286 Cost-optimization method 1 2005
 
National Semiconductor Corporation (4)
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9,087,164 Visualization of tradeoffs between circuit designs 3 2010
* 2010/0325,599 VISUALIZATION OF TRADEOFFS BETWEEN CIRCUIT DESIGNS 16 2010
8,332,789 Power supply optimization for electrical circuits designed over the internet 1 2011
 
HSBC BANK, USA AS COLLATERAL AGENT (1)
* 2004/0181,486 Probe card designed by automated system 1 2004
 
RPX CORPORATION (1)
7,893,724 Method and circuit for rapid alignment of signals 2 2007
 
ALCATEL (1)
* 2003/0041,235 Configuration tool 59 2002
 
Daro Semiconductors Ltd. (1)
* 6,694,494 Method of designing a multi-module single-chip circuit system 3 2002
 
ARM FINANCE OVERSEAS LIMITED (1)
* 2008/0222,581 Remote Interface for Managing the Design and Configuration of an Integrated Circuit Semiconductor Design 13 2007
* Cited By Examiner