Semiconductor device and method of manufacturing thereof
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United States of America Patent
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Jun 17, 2003
Issued Date -
N/A
app pub date -
Apr 17, 2002
filing date -
Mar 26, 1999
priority date (Note) -
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Abstract
By appropriately selecting the structure of top gate type or staggered type TFTs disposed in the respective circuits of a semiconductor device depending on the function of the circuits, the operating characteristics and the reliability of the semiconductor device is improved. An LDD region (107) the whole of which overlaps a gate electrode is provided in a first n-channel type TFT of a controlling circuit. LDD regions (111) and (112) at least part of which overlaps a gate electrode are provided in a second n-channel type TFT of the control circuit. LDD regions (117) to (120) which do not overlap a gate electrode through offset regions are provided in an n-channel type TFT of a pixel matrix circuit. By making different the concentration of LDD regions of the control circuit and the concentration of the pixel matrix circuit, optimized circuit operation is obtained.
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