US Patent No: 6,583,470

Number of patents in Portfolio can not be more than 2000

Radiation tolerant back biased CMOS VLSI

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Abstract

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A CMOS circuit formed in a semiconductor substrate having improved immunity to total ionizing dose radiation, improved immunity to radiation induced latch up, and improved immunity to a single event upset. The architecture of the present invention can be utilized with the n-well, p-well, or dual-well processes. For example, a preferred embodiment of the present invention is described relative to a p-well process wherein the p-well is formed in an n-type substrate. A network of NMOS transistors is formed in the p-well, and a network of PMOS transistors is formed in the n-type substrate. A contact is electrically coupled to the p-well region and is coupled to first means for independently controlling the voltage in the p-well region. Another contact is electrically coupled to the n-type substrate and is coupled to second means for independently controlling the voltage in the n-type substrate. By controlling the p-well voltage, the effective threshold voltages of the n-channel transistors both drawn and parasitic can be dynamically tuned. Likewise, by controlling the n-type substrate, the effective threshold voltages of the p-channel transistors both drawn and parasitic can also be dynamically tuned. Preferably, by optimizing the threshold voltages of the n-channel and p-channel transistors, the total ionizing dose radiation effect will be neutralized and lower supply voltages can be utilized for the circuit which would result in the circuit requiring less power.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
SCIENCE & TECHNOLOGY CORPORATION @ UNMALBUQUERQUE, NM128

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gambles, Jody W Albuquerque, NM 9 58
Hass, Kenneth J Albuquerque, NM 2 44
Maki, Gary K Albuquerque, NM 9 131

Cited Art Landscape

Patent Info (Count) # Cites Year
 
IDAHO RESEARCH FOUNDATION, INC. (3)
4,873,688 High-speed real-time Reed-Solomon decoder 38 1987
5,111,429 Single event upset hardening CMOS memory circuit 52 1990
5,418,473 Single event upset immune logic family 25 1992
 
SCIENCE & TECHNOLOGY CORPORATION @ UNM (2)
5,406,513 Mechanism for preventing radiation induced latch-up in CMOS integrated circuits 52 1993
6,232,794 Electronic circuit with automatic signal conversion 10 1999
 
AEROFLEX COLORADO SPRINGS INC. (1)
5,870,332 High reliability logic circuit for radiation environment 28 1996
 
AMI SEMICONDUCTOR, INC. (1)
4,541,067 Combinational logic structure using PASS transistors 71 1982
 
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (1)
5,481,555 System and method for error detection and reducing simultaneous switching noise 25 1994
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (1)
5,204,841 Virtual multi-port RAM 68 1992
 
MICRON TECHNOLOGY, INC. (1)
6,005,797 Latch-up prevention for memory cells 22 1998
 
OMNET ASSOCIATES A CA PARTNERSHIP (1)
4,587,627 Computational method and apparatus for finite field arithmetic 38 1982

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (7)
7,057,180 Detector for alpha particle or cosmic ray 4 2003
7,499,308 Programmable heavy-ion sensing device for accelerated DRAM soft error detection 1 2007
7,725,870 Method for radiation tolerance by implant well notching 0 2007
7,698,681 Method for radiation tolerance by logic book folding 0 2007
7,675,789 Programmable heavy-ion sensing device for accelerated DRAM soft error detection 0 2008
7,989,282 Structure and method for latchup improvement using through wafer via latchup guard ring 1 2009
8,390,074 Structure and method for latchup improvement using through wafer via latchup guard ring 0 2011
 
COBHAM DEFENSE ELECTRONIC SYSTEMS CORPORATION (1)
7,485,514 Method for fabricating a MESFET 0 2006
 
FREESCALE SEMICONDUCTOR, INC. (1)
7,892,907 CMOS latch-up immunity 0 2008
 
GOOGLE INC. (1)
7,283,410 Real-time adaptive SRAM array for high SEU immunity 32 2006
 
ICS, LLC (1)
8,081,010 Self restoring logic 0 2010
 
INTEL CORPORATION (1)
7,529,118 Generalized interlocked register cell (GICE) 4 2007
 
SONY CORPORATION (1)
7,915,657 Semiconductor integrated circuit 2 2009
 
The United States of America as represented by the Secretary of the Navy (1)
6,777,753 CMOS devices hardened against total dose radiation effects 5 2000
 
UNIVERSITY OF IDAHO (1)
7,489,538 Radiation tolerant combinational logic cell 1 2006

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