Semiconductor device and its manufacturing method

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6583483
APP PUB NO 20020050653A1
SERIAL NO

09909340

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

In semiconductor device 10 under this invention, bonding pads 20 are lined up in a staggered pattern on the main surface of semiconductor chip 14 which is mounted on insulated substrate 12. Multiple stud bumps are stacked on top of the pads 20a which are located on the inner rows, and these stud bumps comprise stud bump stack 28. Conductive wire 22 connects the lands 18 on the insulated substrate with the corresponding bonding pads 20. The wire is formed with its beginning at the land and its end at the bonding pad. Via the stud bump stacks 28, the ends of conductive wire 22a on the inner pads are in a higher position than the ends of conductive wires 22b on the outer pads, so that the problem of neighboring conductive wires coming into contact does not occur.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
TEXAS INSTRUMENTS INCORPORATED12500 TI BLVD MS 3999 DALLAS TX 75243

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Karashima, Akira Oita, JP 8 156
Masumoto, Kenji Hiji, JP 31 597
Masumoto, Mutsumi Beppu, JP 56 674

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation