Generation of amplitude levels for a partial response maximum likelihood (PRML) bit detector
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United States of America Patent
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Jul 1, 2003
Grant Date -
N/A
app pub date -
Sep 20, 1999
filing date -
Sep 18, 1998
priority date (Note) -
Expired
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Abstract
Apparatus for deriving from an input information signal (IIS) amplitude values usable as reference levels for finite state machine states. The apparatus includes: conversion apparatus for deriving a digital signal from the IIS; detection apparatus for repeatedly detecting a state from sequences of n subsequent bits in the digital signal; sample value apparatus for deriving sample values from the IIS, one sample value for each sequence of n bits; processing apparatus for processing the sample values belonging to sequences of n bits of the same state, and for carrying out this processing step for all states, to obtain a processed signal value for each state; output apparatus for supplying the processed signal values for each state as the amplitude values; and apparatus to use the amplitude values for the possible states, obtained from a first portion of the IIS, for detecting bits from a second portion of the IIS.
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