Running-sum adder networks determined by recursive construction of multi-stage networks
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United States of America Patent
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Jul 8, 2003
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N/A
app pub date -
Nov 20, 2000
filing date -
Jun 16, 2000
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Abstract
A technique for physically implementing a running sum adder network and configuring the concomitant adder network of elements. A 2.sup.k+1.times.2.sup.k+1 adder network has the size 2.sup.k+2 -k-3 and depth 2k+1; thus the adder network achieves a very good balance between the measures of size. The adder network utilizes a systematic design method based upon a recursive construction algorithm.
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