Importance

Loading Importance Indicators...

Abstract

A delay locked loop (DLL) usable in a semiconductor memory device and capable of reducing current consumption by operating the DLL loop when the semiconductor device is only at an operation mode, is provided. The semiconductor device includes a clock divider for producing a divided clock signal by dividing an internal clock signal, synchronized with an edge of an external clock signal; a clock generator for producing a reference clock signal, wherein the reference clock signal is activated after a half period of the external clock signal; a delay model for delaying the divided clock signal to compensate for a delay time in delay paths of the internal clock signal; a comparator for comparing a phase difference between the reference clock signal and an output signal from the delay model; a delay unit having a plurality of unit delayers; and a controller for controlling an amount of delay in the internal clock signal and the divided clock signal via the delay unit in response to a phase comparison signal from the comparator.

Loading the Abstract Image...

First Claim