Readable matrix addressable display system

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United States of America Patent

PATENT NO 6597329
SERIAL NO

09227447

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Abstract

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A system having a display device and a processor connected to the display device to read data from and write data to the display device. The display device, such as a matrix addressable display, communicates directly with a processor via a bus, without the need for an intermediate display memory device such as video random access memory (VRAM) or a graphics controller circuit. Information communicated from the processor to the display device is directly presented in a visual fashion. The processor may read the visual information stored in the display device. The display device is able to retain the visual information without the need for continuous refresh operations. Individual pixels of the display may be selectively written by the processor. Since individual pixels may be selectively written, pixels may be written only when their corresponding values have changed, thereby providing better display update performance.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BLVD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Moss, Daniel D Forest Grove, OR 2 7

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