Monitoring error conditions in an integrated circuit
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United States of America Patent
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Jul 22, 2003
Grant Date -
N/A
app pub date -
Oct 1, 1999
filing date -
Oct 1, 1999
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
The invention relates to monitoring error conditions in an integrated circuit. The integrated circuit has a packet router to which a plurality of functional modules are connected between which packets are transmitted. Each functional module is associated with an error monitoring register for monitoring error conditions. The error monitoring register contains a plurality of error flags which can be set when a particular error condition is detected. The invention particularly but not exclusively relates to the setting of communication error flags relating to errors in communication of the packet.
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