Isolation testing scheme for multi-die packages

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6599764
SERIAL NO

09870354

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A test platform is configured to test a mult-die package having at a first die and a second die. The test platform includes a first lead that is connected to the VCC input on the first die. The test platform also includes a second lead that is connected to VCCIO input on the second die. The VCC input on the second die is connected to ground. The I/O pin of the second die can then be tri-stated using a control circuit disposed between the pre-driver and the driver of the I/O buffer.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
ALTERA CORPORATIONSAN JOSE, CA4155

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ang, Boon Jin Penang, MY 33 248
Cheung, Sammy Pleasanton, CA 11 134
Chua, Kar Keng Penang, MY 30 133

Cited Art Landscape

Patent Info (Count) # Cites Year
 
ATI TECHNOLOGIES ULC (1)
* 6351681 Method and apparatus for a multi-chip module that is testable and reconfigurable based on testing results 33 1998
 
MICRON TECHNOLOGY, INC. (2)
* 5796746 Device and method for testing integrated circuit dice in an integrated circuit module 49 1996
* 6240535 Device and method for testing integrated circuit dice in an integrated circuit module 24 1998
* Cited By Examiner

Patent Citation Ranking

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Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (2)
* 2004/0154,956 Stacked die module and techniques for forming a stacked die module 1 2004
* 2009/0219,777 MULTI-CHIP ASSEMBLY AND METHOD FOR DRIVING THE SAME 0 2009
 
POLARIS INNOVATIONS LIMITED (2)
* 7855463 Method for producing a circuit module comprising at least one integrated circuit 4 2007
* 2008/0061,423 METHOD FOR PRODUCING A CIRCUIT MODULE COMPRISING AT LEAST ONE INTEGRATED CIRCUIT 43 2007
 
SANDISK TECHNOLOGIES LLC (6)
* 6797538 Memory package 11 2003
* 2004/0036,155 Memory package 6 2003
7064003 Memory package 4 2004
* 2005/0018,505 Memory package 0 2004
7429781 Memory package 4 2006
* 2006/0128,101 Memory package 2 2006
 
MICRON TECHNOLOGY, INC. (1)
7755204 Stacked die module including multiple adhesives that cure at different temperatures 1 2003
 
HYNIX SEMICONDUCTOR INC. (1)
* 2005/0151,237 Multi-chip assembly and method for driving the same 1 2004
 
NXP USA, INC. (2)
7262615 Method and apparatus for testing a semiconductor structure having top-side and bottom-side connections 15 2005
* 2007/0096,760 Method and apparatus for testing a semiconductor structure having top-side and bottom-side connections 1 2005
* Cited By Examiner