Importance

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Abstract

A memory access request handling unit is arranged between a source of memory access requests and a data storage element that is the target of the memory access requests. The memory access request handling unit comprises a queue made up of a number of queue elements, each being capable of temporarily storing one memory access request. Comparison logic is arranged to monitor a window of the queue and to select one or more of the queue elements, representing memory access requests not yet transmitted to the data storage element, for transmission to the data storage element. The selection is made on the basis of a comparison between the memory access requests held in the queue and one or both of a priority value set for each memory access request and a list of memory access requests that are currently pending at the data storage element, the list being maintained in a list store of the memory access request handling unit. Examples of the data storage element and source are a processor and cache combination, two cache memories at different levels of a system hierarchy, and a processor unit (with or without cache) and a main memory unit.

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First Claim