| 7,425,841 Configurable circuits, IC's, and systems
|
28 |
2004
|
| 7,312,630 Configurable integrated circuit with built-in turns
|
17 |
2004
|
| 7,284,222 Method and apparatus for identifying connections between configurable nodes in a configurable integrated circuit
|
18 |
2004
|
| 7,193,432 VPA logic circuits
|
18 |
2004
|
| 7,193,438 Configurable integrated circuit with offset connection
|
22 |
2004
|
| 7,193,440 Configurable circuits, IC's, and systems
|
56 |
2004
|
| 7,167,025 Non-sequentially configurable IC
|
39 |
2004
|
| 7,157,933 Configurable circuits, IC's, and systems
|
27 |
2004
|
| 7,145,361 Configurable integrated circuit with different connection schemes
|
30 |
2004
|
| 7,126,373 Configurable logic circuits with commutative properties
|
21 |
2004
|
| 7,126,381 VPA interconnect circuit
|
17 |
2004
|
| 7,109,752 Configurable circuits, IC's, and systems
|
79 |
2004
|
| 7,917,559 Configurable IC's with configurable logic circuits that perform adder and/or subtractor operations
|
1 |
2005
|
| 7,825,684 Variable width management for a memory of a configurable IC
|
5 |
2005
|
| 7,743,085 Configurable IC with large carry chains
|
2 |
2005
|
| 7,573,296 Configurable IC with configurable routing resources that have asymmetric input and/or outputs
|
13 |
2005
|
| 7,530,044 Method for manufacturing a programmable system in package
|
2 |
2005
|
| 7,496,879 Concurrent optimization of physical design and operational cycle assignment
|
8 |
2005
|
| 7,428,721 Operational cycle assignment in a configurable IC
|
16 |
2005
|
| 7,342,415 Configurable IC with interconnect circuits that also perform storage operations
|
35 |
2005
|
| 7,330,050 Storage elements for a configurable IC and method and apparatus for accessing data stored in the storage elements
|
25 |
2005
|
| 7,317,331 Reconfigurable IC that has sections running at different reconfiguration rates
|
22 |
2005
|
| 7,310,003 Configurable IC with interconnect circuits that have select lines driven by user signals
|
10 |
2005
|
| 7,301,368 Embedding memory within tile arrangement of a configurable IC
|
27 |
2005
|
| 7,298,169 Hybrid logic/interconnect circuit in a configurable IC
|
31 |
2005
|
| 7,295,037 Configurable IC with routing circuits with offset connections
|
46 |
2005
|
| 7,282,950 Configurable IC's with logic resources with offset connections
|
20 |
2005
|
| 7,276,933 Reconfigurable IC that has sections running at different looperness
|
22 |
2005
|
| 7,268,586 Method and apparatus for accessing stored data in a reconfigurable IC
|
28 |
2005
|
| 7,259,587 Configurable IC's with configurable logic resources that have asymetric inputs and/or outputs
|
25 |
2005
|
| 7,242,216 Embedding memory between tile arrangement of a configurable IC
|
34 |
2005
|
| 7,236,009 Operational time extension
|
38 |
2005
|
| 7,224,181 Clock distribution in a configurable IC
|
25 |
2005
|
| 7,224,182 Hybrid configurable circuit for a configurable IC
|
71 |
2005
|
| 7,818,361 Method and apparatus for performing two's complement multiplication
|
4 |
2005
|
| 7,765,249 Use of hybrid interconnect/logic circuits for multiplication
|
2 |
2005
|
| 7,530,033 Method and apparatus for decomposing functions in a configurable IC
|
31 |
2005
|
| 7,372,297 Hybrid interconnect/logic circuits enabling efficient replication of a function in several sub-cycles to save logic and routing resources
|
26 |
2005
|
| 7,307,449 Sub-cycle configurable hybrid logic/interconnect circuit
|
13 |
2005
|
| 7,679,401 User registers implemented with routing circuits in a configurable IC
|
6 |
2005
|
| 7,489,162 Users registers in a reconfigurable IC
|
7 |
2005
|
| 7,461,362 Replacing circuit design elements with their equivalents
|
1 |
2005
|
| 7,797,497 System and method for providing more logical memory ports than physical memory ports
|
5 |
2006
|
| 7,694,083 System and method for providing a virtual memory architecture narrower and deeper than a physical memory architecture
|
6 |
2006
|
| 7,609,085 Configurable integrated circuit with a 4-to-1 multiplexer
|
14 |
2006
|
| 7,518,400 Barrel shifter implemented on a configurable integrated circuit
|
9 |
2006
|
| 7,504,858 Configurable integrated circuit with parallel non-neighboring offset connections
|
8 |
2006
|
| 7,788,478 Accessing multiple user states concurrently in a configurable IC
|
11 |
2006
|
| 7,550,991 Configurable IC with trace buffer and/or logic analyzer functionality
|
15 |
2006
|
| 7,548,085 Random access of user design states in a configurable IC
|
15 |
2006
|
| 7,512,850 Checkpointing user design states in a configurable IC
|
19 |
2006
|
| 7,492,186 Runtime loading of configuration data in a configurable IC
|
17 |
2006
|
| 7,443,196 Configuration network for a configurable IC
|
31 |
2006
|
| 7,375,550 Configurable IC with packet switch configuration network
|
24 |
2006
|
| 7,669,097 Configurable IC with error detection and correction circuitry
|
15 |
2006
|
| 7,529,992 Configurable integrated circuit with error correcting circuitry
|
19 |
2006
|
| 7,532,032 Configurable circuits, IC's, and systems
|
38 |
2006
|
| 7,564,260 VPA interconnect circuit
|
2 |
2006
|
| 7,439,766 Configurable logic circuits with commutative properties
|
4 |
2006
|
| 7,557,609 Configurable integrated circuit with different connection schemes
|
9 |
2006
|
| 7,449,915 VPA logic circuits
|
6 |
2006
|
| 7,408,382 Configurable circuits, IC's, and systems
|
8 |
2006
|
| 7,667,486 Non-sequentially configurable IC
|
15 |
2006
|
| 7,587,697 System and method of mapping memory blocks in a configurable integrated circuit
|
13 |
2006
|
| 7,616,027 Configurable circuits, IC's and systems
|
16 |
2006
|
| 7,468,614 Configurable integrated circuit with offset connections
|
8 |
2007
|
| 7,420,389 Clock distribution in a configurable IC
|
22 |
2007
|
| 7,521,958 Hybrid configurable circuit for a configurable IC
|
33 |
2007
|
| 7,804,730 Method and apparatus for accessing contents of memory cells
|
10 |
2007
|
| 7,587,698 Operational time extension
|
25 |
2007
|
| 8,112,468 Method and apparatus for performing an operation with a plurality of sub-operations in a configurable IC
|
1 |
2007
|
| 7,610,566 Method and apparatus for function decomposition
|
16 |
2007
|
| 7,535,252 Configurable ICs that conditionally transition through configuration data sets
|
15 |
2007
|
| 7,525,344 Configurable IC having a routing fabric with storage elements
|
6 |
2007
|
| 7,521,959 Configurable IC having a routing fabric with storage elements
|
6 |
2007
|
| 7,514,957 Configurable IC having a routing fabric with storage elements
|
12 |
2007
|
| 7,564,261 Embedding memory between tile arrangement of a configurable IC
|
17 |
2007
|
| 8,412,990 Dynamically tracking data values in a configurable IC
|
0 |
2007
|
| 8,069,425 Translating a user design in a configurable IC for debugging the user design
|
5 |
2007
|
| 7,839,162 Configurable IC with deskewing circuits
|
10 |
2007
|
| 7,652,498 Integrated circuit with delay selecting input selection circuitry
|
21 |
2007
|
| 7,595,655 Retrieving data from a configurable IC
|
19 |
2007
|
| 7,579,867 Restructuring data from a trace buffer of a configurable IC
|
13 |
2007
|
| 7,501,855 Transport network for a configurable IC
|
16 |
2007
|
| 7,518,402 Configurable IC with configuration logic resources that have asymmetric inputs and/or outputs
|
12 |
2007
|
| 7,532,030 Method and apparatus for accessing stored data in a reconfigurable IC
|
18 |
2007
|
| 7,626,419 Via programmable gate array with offset bit lines
|
4 |
2007
|
| 7,525,342 Reconfigurable IC that has sections running at different looperness
|
16 |
2007
|
| 7,525,835 Method and apparatus for reduced power cell
|
16 |
2007
|
| 7,849,434 Method and apparatus for identifying connections between configurable nodes in a configurable integrated circuit
|
5 |
2007
|
| 7,839,166 Configurable IC with logic resources with offset connections
|
7 |
2007
|
| 7,936,074 Programmable system in package
|
1 |
2007
|
| 7,576,564 Configurable IC with routing circuits with offset connections
|
29 |
2007
|
| 7,656,188 Reconfigurable IC that has sections running at different reconfiguration rates
|
15 |
2007
|
| 7,816,944 Variable width writing to a memory of an IC
|
5 |
2007
|
| 7,652,499 Embedding memory within tile arrangement of an integrated circuit
|
12 |
2007
|
| 7,528,627 Method and apparatus for performing shifting in an integrated circuit
|
6 |
2007
|
| 7,932,742 Configurable IC with interconnect circuits that have select lines driven by user signals
|
0 |
2007
|
| 7,737,722 Configurable integrated circuit with built-in turns
|
6 |
2007
|
| 7,570,077 Storage elements for a configurable IC and method and apparatus for accessing data stored in the storage elements
|
16 |
2007
|
| 7,622,951 Via programmable gate array with offset direct connections
|
1 |
2008
|
| 7,545,167 Configurable IC with interconnect circuits that also perform storage operations
|
20 |
2008
|
| 7,971,172 IC that efficiently replicates a function to save logic and routing resources
|
0 |
2008
|
| 7,548,090 Configurable IC with packet switch network
|
16 |
2008
|
| 7,696,780 Runtime loading of configuration data in a configurable IC
|
20 |
2008
|
| 8,166,435 Timing operations in an IC with configurable circuits
|
0 |
2008
|
| 7,870,529 Operational cycle assignment in a configurable IC
|
1 |
2008
|
| 7,870,530 Operational cycle assignment in a configurable IC
|
2 |
2008
|
| 7,694,265 Operational cycle assignment in a configurable IC
|
5 |
2008
|
| 8,201,124 System in package and method of creating system in package
|
3 |
2008
|
| 7,872,496 Method of mapping a user design defined for a user design cycle to an IC with multiple sub-cycle reconfigurable circuits
|
10 |
2008
|
| 8,344,755 Configuration context switcher
|
0 |
2008
|
| 8,248,101 Reading configuration data from internal storage node of configuration storage circuit
|
0 |
2008
|
| 7,928,761 Configuration context switcher with a latch
|
9 |
2008
|
| 7,825,685 Configuration context switcher with a clocked storage element
|
11 |
2008
|
| 7,728,617 Debug network for a configurable IC
|
12 |
2008
|
| 8,093,922 Configurable IC having a routing fabric with storage elements
|
0 |
2009
|
| 7,825,687 Storage elements for a configurable IC and method and apparatus for accessing data stored in the storage elements
|
12 |
2009
|
| 7,898,291 Operational time extension
|
12 |
2009
|
| 7,973,558 Integrated circuit with delay selecting input selection circuitry
|
6 |
2009
|
| 8,183,882 Reconfigurable IC that has sections running at different reconfiguration rates
|
1 |
2009
|
| 7,948,266 Non-sequentially configurable IC
|
9 |
2010
|
| 8,089,300 Users registers implemented with routing circuits in a configurable IC
|
1 |
2010
|
| 7,962,705 System and method for providing a virtual memory architecture narrower and deeper than a physical memory architecture
|
0 |
2010
|
| 8,115,510 Configuration network for an IC
|
5 |
2010
|
| 8,067,960 Runtime loading of configuration data in a configurable IC
|
4 |
2010
|
| 7,994,817 Configurable integrated circuit with built-in turns
|
2 |
2010
|
| 8,248,102 Configurable IC'S with large carry chains
|
0 |
2010
|
| 8,072,234 Micro-granular delay testing of configurable ICs
|
5 |
2010
|
| 8,433,891 Accessing multiple user states concurrently in a configurable IC
|
0 |
2010
|
| 8,230,182 System and method for providing more logical memory ports than physical memory ports
|
|
2010
|
| 8,138,789 Configuration context switcher with a clocked storage element
|
1 |
2010
|
| 8,159,264 Storage elements for a configurable IC and method and apparatus for accessing data stored in the storage elements
|
1 |
2010
|
| 8,350,591 Configurable IC's with dual carry chains
|
0 |
2010
|
| 8,143,915 IC with deskewing circuits
|
4 |
2010
|
| 8,281,273 Method and apparatus for identifying connections between configurable nodes in a configurable integrated circuit
|
0 |
2010
|
| 8,193,830 Configurable circuits, IC's, and systems
|
1 |
2010
|
| 8,434,045 System and method of providing a memory hierarchy
|
0 |
2011
|
| 8,305,110 Non-sequentially configurable IC
|
0 |
2011
|
| 8,324,931 Configuration context switcher with a latch
|
0 |
2011
|
| 8,415,973 Configurable integrated circuit with built-in turns
|
0 |
2011
|
| 7,024,650 Method and apparatus for considering diagonal wiring in placement
|
9 |
2000
|
| 7,089,523 Method and apparatus for using connection graphs with potential diagonal edges to model interconnect topologies during placement
|
6 |
2000
|
| 7,055,120 Method and apparatus for placing circuit modules
|
5 |
2002
|
| 7,107,564 Method and apparatus for routing a set of nets
|
7 |
2002
|
| 7,069,530 Method and apparatus for routing groups of paths
|
1 |
2002
|
| 7,069,531 Method and apparatus for identifying a path between source and target states in a space with more than two dimensions
|
1 |
2002
|
| 6,957,408 Method and apparatus for routing nets in an integrated circuit layout
|
4 |
2002
|
| 6,898,773 Method and apparatus for producing multi-layer topological routes
|
22 |
2002
|
| 7,114,141 Method and apparatus for decomposing a design layout
|
4 |
2002
|
| 6,957,409 Method and apparatus for generating topological routes for IC layouts using perturbations
|
3 |
2002
|
| 6,928,633 IC layout having topological routes
|
2 |
2002
|
| 6,898,772 Method and apparatus for defining vias
|
2 |
2002
|
| 7,073,151 Method and apparatus for identifying a path between a set of source states and a set of target states in a triangulated space
|
0 |
2002
|
| 7,058,917 Method and apparatus for specifying a cost function that represents the estimated distance between an external state and a set of states in a space
|
1 |
2002
|
| 7,047,512 Method and apparatus for specifying a cost function that represents the estimated distance between an external state and a set of states in a space
|
2 |
2002
|
| 7,117,468 Layouts with routes with different spacings in different directions on the same layer, and method and apparatus for generating such layouts
|
25 |
2002
|
| 7,096,449 Layouts with routes with different widths in different directions on the same layer, and method and apparatus for generating such layouts
|
15 |
2002
|
| 7,036,105 Integrated circuits with at least one layer that has more than one preferred interconnect direction, and method for manufacturing such IC's
|
10 |
2002
|
| 6,973,634 IC layouts with at least one layer that has more than one preferred interconnect direction, and method and apparatus for generating such a layout
|
8 |
2002
|
| 6,957,411 Gridless IC layout and method and apparatus for generating such a layout
|
3 |
2002
|
| 6,938,234 Method and apparatus for defining vias
|
5 |
2002
|
| 7,089,524 Topological vias route wherein the topological via does not have a coordinate within the region
|
6 |
2002
|
| 7,032,201 Method and apparatus for decomposing a region of an integrated circuit layout
|
3 |
2002
|
| 7,020,863 Method and apparatus for decomposing a region of an integrated circuit layout
|
3 |
2002
|
| 7,000,209 Method and apparatus for propagating a piecewise linear function to a surface
|
0 |
2002
|
| 6,978,432 Method and apparatus for propagating a piecewise linear function to a point
|
0 |
2002
|
| 6,915,499 Method and apparatus for propagating a piecewise linear function to a line
|
2 |
2002
|
| 7,013,448 Method and apparatus for propagating cost functions
|
0 |
2002
|
| 7,013,451 Method and apparatus for performing routability checking
|
5 |
2002
|
| 6,948,144 Method and apparatus for costing a path expansion
|
2 |
2002
|
| 6,944,841 Method and apparatus for proportionate costing of vias
|
0 |
2002
|
| 6,886,149 Method and apparatus for routing sets of nets
|
4 |
2002
|
| 6,931,608 Method and apparatus for determining viability of path expansions
|
1 |
2002
|
| 7,080,329 Method and apparatus for identifying optimized via locations
|
2 |
2002
|
| 7,506,295 Non manhattan floor plan architecture for integrated circuits
|
1 |
2002
|
| 7,480,885 Method and apparatus for routing with independent goals on different layers
|
13 |
2002
|
| 7,246,338 Method and apparatus for computing cost of a path expansion to a surface
|
4 |
2002
|
| 7,216,308 Method and apparatus for solving an optimization problem in an integrated circuit layout
|
3 |
2002
|
| 7,171,635 Method and apparatus for routing
|
19 |
2002
|
| 7,093,221 Method and apparatus for identifying a group of routes for a set of nets
|
2 |
2002
|
| 7,089,519 Method and system for performing placement on non Manhattan semiconductor integrated circuits
|
4 |
2002
|
| 7,080,342 Method and apparatus for computing capacity of a region for non-Manhattan routing
|
17 |
2002
|
| 7,051,298 Method and apparatus for specifying a distance between an external state and a set of states in space
|
0 |
2002
|
| 7,047,513 Method and apparatus for searching for a three-dimensional global path
|
10 |
2002
|
| 7,013,445 Post processor for optimizing manhattan integrated circuits placements into non manhattan placements
|
13 |
2002
|
| 7,010,771 Method and apparatus for searching for a global path
|
15 |
2002
|
| 7,003,752 Method and apparatus for routing
|
13 |
2002
|
| 6,996,789 Method and apparatus for performing an exponential path search
|
15 |
2002
|
| 6,988,257 Method and apparatus for routing
|
7 |
2002
|
| 6,986,117 Method and apparatus for identifying a path between source and target states
|
7 |
2002
|
| 6,931,615 Method and apparatus for identifying a path between source and target states
|
1 |
2002
|
| 6,892,369 Method and apparatus for costing routes of nets
|
6 |
2002
|
| 6,889,371 Method and apparatus for propagating a function
|
11 |
2002
|
| 8,112,733 Method and apparatus for routing with independent goals on different layers
|
2 |
2008
|
| 8,341,586 Method and system for routing
|
0 |
2009
|
| 6,798,239 Programmable gate array having interconnecting logic to support embedded fixed logic circuitry
|
26 |
2001
|
| 6,996,758 Apparatus for testing an interconnecting logic fabric
|
18 |
2001
|
| 6,983,405 Method and apparatus for testing circuitry embedded within a field programmable gate array
|
14 |
2001
|
| 6,886,092 Custom code processing in PGA by providing instructions from fixed logic processor portion to programmable dedicated processor portion
|
55 |
2001
|
| 6,781,407 FPGA and embedded circuitry initialization and processing
|
13 |
2002
|
| 6,820,248 Method and apparatus for routing interconnects to devices with dissimilar pitches
|
3 |
2002
|
| 6,976,160 Method and system for controlling default values of flip-flops in PGA/ASIC-based designs
|
21 |
2002
|
| 6,754,882 Method and system for creating a customized support package for an FPGA-based system-on-chip (SoC)
|
17 |
2002
|
| 7,007,121 Method and apparatus for synchronized buses
|
3 |
2002
|
| 6,934,922 Timing performance analysis
|
10 |
2002
|
| 7,111,217 Method and system for flexibly nesting JTAG TAP controllers for FPGA-based system-on-chip (SoC)
|
9 |
2002
|
| 6,839,874 Method and apparatus for testing an embedded device
|
17 |
2002
|
| 7,187,709 High speed configurable transceiver architecture
|
7 |
2002
|
| 7,111,220 Network physical layer with embedded multi-standard CRC generator
|
6 |
2002
|
| 7,088,767 Method and apparatus for operating a transceiver in different data rates
|
5 |
2002
|
| 6,961,919 Method of designing integrated circuit having both configurable and fixed logic circuitry
|
10 |
2002
|
| 6,772,405 Insertable block tile for interconnecting to a device embedded in an integrated circuit
|
5 |
2002
|
| 7,085,973 Testing address lines of a memory controller
|
3 |
2002
|
| 7,099,426 Flexible channel bonding and clock correction operations on a multi-block data path
|
8 |
2002
|
| 7,092,865 Method and apparatus for timing modeling
|
7 |
2002
|
| 7,379,855 Method and apparatus for timing modeling
|
4 |
2002
|
| 6,772,406 Method for making large-scale ASIC using pre-engineered long distance routing structure
|
12 |
2003
|
| 7,421,014 Channel bonding of a plurality of multi-gigabit transceivers
|
1 |
2003
|
| 7,080,300 Testing a programmable logic device with embedded fixed logic using a scan chain
|
21 |
2004
|
| 7,552,415 Method and system for creating a customized support package for an FPGA-based system-on-chip (SoC)
|
5 |
2004
|
| 6,996,796 Method and system for creating a customized support package for an FPGA-based system-on-chip (SoC)
|
7 |
2004
|
| 6,944,842 Method for making large-scale ASIC using pre-engineered long distance routing structure
|
2 |
2004
|
| 7,420,392 Programmable gate array and embedded circuitry initialization and processing
|
5 |
2004
|
| 7,194,600 Method and apparatus for processing data with a programmable gate array using fixed and programmable processors
|
5 |
2005
|
| 7,254,794 Timing performance analysis
|
2 |
2005
|
| 7,539,848 Configurable logic fabric including two fixed logic processors with individual interface to receive availability signal from custom operation code configured processor
|
3 |
2005
|
| 7,406,557 Programmable logic device including programmable interface core and central processing unit
|
2 |
2006
|
| 7,266,632 Programmable logic device including programmable interface core and central processing unit
|
11 |
2006
|
| 7,526,689 Testing address lines of a memory controller
|
1 |
2006
|
