Client/server behavioral modeling and testcase development using VHDL for improved logic verification
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United States of America Patent
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Jul 29, 2003
Grant Date -
N/A
app pub date -
Mar 9, 2000
filing date -
Mar 9, 2000
priority date (Note) -
Expired
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Abstract
A system, method and computer program features of the present invention, relate to verification or simulation of a design using a behavioral model structure for use in a Client/Server configuration. A physical part presents the external interface, and a functional procedural part which is comprised of at least one VHDL process. A testcase is a set of procedure calls written in VHDL. The present invention describes the architecture and implementation of a client/server behavioral model and procedural approach for testcase development which results in significant gain in productivity, quality of logic verification, and portability.
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