Process for producing an integrated semiconductor memory configuration

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6605505
APP PUB NO 20010039106A1
SERIAL NO

09883011

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Abstract

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A process for producing an integrated semiconductor memory configuration, in particular one suited to the use of ferroelectric materials as storage dielectrics, in which a conductive connection between one electrode of a storage capacitor and a selection transistor is not produced until after the storage dielectric has been deposited; and a semiconductor memory configuration produced using the production process.

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Patent Owner(s)

  • POLARIS INNOVATIONS LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hintermaier, Frank Munchen, DE 20 206
Mazure-Espejo, Carlos Zorneding, DE 23 171

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