Structure and method for implementing wide multiplexers
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United States of America Patent
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Aug 12, 2003
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N/A
app pub date -
Dec 14, 2001
filing date -
Dec 14, 2001
priority date (Note) -
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Abstract
A method and a structure provide in a programmable logic device wide multiplexers without increasing delay and the number of interconnections in an input routing resource over corresponding multiplexer with less number of input signals. In one embodiment, each of a number of 8-input multiplexers shares both common input signals and common selection signals with a neighboring multiplexer. Even wider multiplexers can be achieved by cascading the multiplexers in a conventional manner.
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