System and method of providing a programmable clock architecture for an advanced microcontroller
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United States of America Patent
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Sep 2, 2003
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app pub date -
Oct 24, 2001
filing date -
Oct 26, 2000
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Abstract
One embodiment of the present invention is a programmable clock architecture for a microcontroller that provides multiple different clocking signal frequencies that may be utilized by one or more programmable logic blocks of the microcontroller. In this manner, the clocking architecture enables the programmable logic blocks to perform a wider variety of functions because they have access to a wider variety of clock signal frequencies. Specifically, the clocking architecture of the present embodiment includes a plurality of clocking sources. For example, the output clocking signal of one of the clock oscillators is divided down to different smaller frequencies and also multiplied to provide more frequencies that may be utilized by the programmable circuit blocks and processor of the microcontroller. Additionally, the clocking architecture includes a programmable option of utilizing precision clocking signals and/or less precise clocking signals depending on the desired applications of the microcontroller's programmable circuit blocks.
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Patent Owner(s)
- MONTEREY RESEARCH, LLC
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Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Kutz, Harold | Snoquolmie, WA | 68 | 1364 |
Sullam, Bert | Bellevue, WA | 40 | 926 |
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Fee | Large entity fee | small entity fee | micro entity fee |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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