Reduced substrate capacitance high performance SOI process
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United States of America Patent
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Sep 9, 2003
Issued Date -
N/A
app pub date -
May 6, 2002
filing date -
Jul 7, 1999
priority date (Note) -
Expired
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Abstract
A silicon on insulator substrate is provided to include the following: a handle wafer; a layer of bonding material; a device wafer, the device wafer including at least one buried impurity region extending from the layer of bonding material upward into the device wafer; and an epitaxial silicon layer provided on a second surface of the device wafer. The silicon on insulator substrate with this configuration can be made with a minimal possible thickness.
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