US Patent No: 6,625,713
Number of patents in Portfolio can not be more than 2000
Memory controller and method for managing a logical/physical address control table
Stats
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Sep 23, 2003
Issued date -
Mar 19, 2002
filing date -
10/100,722
serial no -
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Abstract
A memory controller for reading data stored in a nonvolatile memory that includes a number of erasable blocks containing a number of pages. A logical/physical address control table stored in a logical/physical address control table block of the nonvolatile memory is searched, read, and manipulated in the nonvolatile memory.
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First Claim
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International Classification(s)
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Cited Art
| Patent Info | (Count) | # Cites | Year |
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| 4,373,179 Dynamic address translation system | 45 | 1978 | |
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| 6,377,500 Memory system with a non-volatile memory, having address translating function | 57 | 2000 | |
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| 5,937,193 Circuit arrangement for translating platform-independent instructions for execution on a hardware platform and method thereof | 75 | 1996 | |
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| 4,755,985 Method and apparatus for facilitating moves and changes in a communication system | 21 | 1986 | |
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