Advanced load address table entry invalidation based on register address wraparound

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United States of America Patent

PATENT NO 6631460
SERIAL NO

09559508

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A computer system includes physical registers holding data for compiled programs and a portion of the physical registers form a register stack which wraps around when full. An N-bit current wraparound count state tracks physical register remapping events which cause the register stack to wraparound or unwrap. An advanced load address table (ALAT) has entries corresponding to load instructions, each entry has at least one memory range field defining a range of memory locations accessed by a corresponding load instruction, a physical register number field corresponding to a physical register accessed in the corresponding load instruction, and an N-bit register wraparound field which corresponds to the N-bit current wraparound count state for the corresponding load instruction. A check instruction accesses the ALAT to determine whether a store instruction and an advanced load instruction, which is scheduled before the store instruction, potentially accessed a common memory location. After the execution of the store instruction, an absence of an entry corresponding to the load instruction in the ALAT indicates that a common memory location may have been accessed by the store and load instructions.

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Patent Owner(s)

Patent OwnerAddress
INSTITUTE FOR THE DEVELOPMENT OF EMERGING ARCHITECTURES L L C19447 PRUNERIDGE AVE C/O HEWLETT-PACKARD COMPANY CUPERTINO CA 95014

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bry, William R Saratoga, CA 1 25
Chen, William Sunnyvale, CA 70 3308
Karp, Alan H Palo Alto, CA 86 3058
Morris, Dale C Menlo Park, CA 35 946

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