CMOS-type semiconductor device and method of fabricating the same
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United States of America Patent
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Oct 21, 2003
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app pub date -
Mar 29, 1999
filing date -
Dec 28, 1998
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Abstract
In the fabrication of a CMOS-TFT, non-selectively doping (for both of p-and n-type TFTS) and selectively doping (only for the n-type TFT) with p-type impurities (B: boron) are successively performed at very low concentrations to control the threshold voltages (Vthp and Vthn). More specifically, the Id-Vg characteristics of the p- and n-type TFTs are initially negatively shifted. In this state, non-selectively doping is performed positively to shift the p- and n-type TFTs first to adjust the Vthp to a specified value. Selectively doping is then performed positively to shift only the n-type TFT to adjust the Vthn to a specified value. The threshold voltages of the p- and n-type TFTs constructing the CMOS-TFT can be independently and efficiently (with minimum photolithography) controlled with high accuracy.
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