Semiconductor memory device having improved data transfer rate without providing a register for holding write data
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Oct 21, 2003
Issued Date -
N/A
app pub date -
Jan 29, 2002
filing date -
Nov 22, 1999
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A semiconductor memory device has a read data line, a write data line, a data holding circuit, and a data writing circuit. The data holding circuit holds data on the write data line, and the data writing circuit writes the data held on the write data line into a memory cell. Further, a semiconductor memory device has a read data line, a write data line, and an address information holding circuit. The address information holding circuit holds address information that is input in relation to write data, and when an access occurs to the address held in the address information holding circuit, data held on the write data line is written into a memory cell corresponding to the address.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully