Methods of fabricating semiconductor devices with barrier layers
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United States of America Patent
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Nov 4, 2003
Grant Date -
Apr 4, 2002
app pub date -
May 1, 2001
filing date -
Sep 29, 2000
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The present invention relates to semiconductor device and a fabricating methods thereof which enable to improve device characteristics such as threshold voltage and the like by preventing p type impurities doping a gate from penetrating into a channel region of a substrate through a SiO.sub.2 layer. The present invention also relates to preventing transconductance due to reciprocal reaction of traps from decreasing by re-oxidation, wherein a first and a second oxynitride layer are formed at a first interface between a SiO.sub.2 layer and a gate of p-doped polysilicon and a second interface between the SiO.sub.2 layer and a silicon substrate, respectively.
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